DTIC ADA1007764: Programmable Image Processing Element pdf

DTIC ADA1007764: Programmable Image Processing Element

More Book Details

Description of the Book:

The generic signal-processing equations were analyzed and two specific architectures were evolved for the efficient implementation of these equations. The first architecture which was considered consisted of a set for four arithmetic sections. Each section was capable of combining a pair of 4-element vectors, 16 bits per element, using distributed arithmetic. The second architectural design was pursued which consisted of a single arithmetic section. Input word lengths are limited to 8 bits, 2’s complement. Coefficients are variable. The output is full precision. Input data (x’s) may be loaded in parallel sequentially, or in parallel 3 at a time; or serially 1, 3 or 9 at a time. The device can be programmed to function as a sliding window, a transversal filter, or a vector multiplier. Multiple devices may be chained together to increase computational accuracy or to extend filter lengths beyond 9 taps

• Creator/s: Defense Technical Information Center
• Date: 2/1/1981
• Year: 1981
• Book Topics/Themes: DTIC Archive, White, Stanley A, ROCKWELL INTERNATIONAL ANAHEIM CA, *IMAGE PROCESSING, *COMPUTER APPLICATIONS, ALGORITHMS, SIGNAL PROCESSING, COMPUTER ARCHITECTURE, MODULATORS, CIRCUIT ANALYSIS, DIGITAL FILTERS, REGISTERS(CIRCUITS

An excerpt captured from the PDF book