DTIC ADA203147: Investigation of a Self Aligned pdf

DTIC ADA203147: Investigation of a Self Aligned

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The idea of a new type of Semiconductor Insulator Semiconductor Field Effect Transistor (SISFET) device has been investigated. The attempted design consists of a heavily doped n-type InAs gate with undoped Al(0.5)Ga(0.5)AS as the gate insulator and with undoped In(0.15)Ga(0.85)As as a strained-channel on an undoped GaAs buffer layer. SISFETs provide freedom from the Donor compleX (DX) center and have threshold voltages which are independent of the AlGaAs doping and thickness. Calculations predict that the proposed pseudomorphic structure would produce a device with a natural threshold voltage of approximately 0.6 volts. This would be well suited to digital logic applications. Calculations also predict that this new material structure would provide a barrier to gate leakage of greater than 0.3 volts up to 2.5 volts of positive gate bias. The layers were grown by MBE, and devices were fabricated using a self-aligned process which involved ion implantation and rapid thermal annealing.

Some finished samples exhibited transistor action, but problems included inordinately high gate leakage and non-ohmic source and drain contacts. Theses

• Creator/s: Defense Technical Information Center
• Date: 11/30/1988
• Year: 1988
• Book Topics/Themes: DTIC Archive, Rapp, David W, AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OH SCHOOL OF ENGINEERING, *TRANSISTORS, *ALIGNMENT, *ION IMPLANTATION, *GALLIUM ARSENIDES, *DOPING, *GATES(CIRCUITS), *ELECTRICAL INSULATION, VOLTAGE, BARRIERS, SELF OPERATION, LOGIC, BIAS, THERMAL RADIATION, THESES, THRESHOLD EFFECTS, MATERIALS, LAYERS, ANNEALING, THICKNESS, BUFFERS, DIGITAL SYSTEMS

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