DTIC ADA442968: The Torus Routing Chip pdf

DTIC ADA442968: The Torus Routing Chip

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The torus routing chip (TRC) is a self-timed chip that performs deadlock-free cut-through routing in k-ary n-cube multiprocessor interconnection networks using a new method of deadlock avoidance called virtual channels. A prototype TRC with byte wide self-timed communication channels achieved on first silicon a throughput of 64Mbits/s in each dimension, about an order of magnitude better performance than the communication networks used by machines such as the Caltech Cosmic Cube or Intel iPSC. The latency of the cut-through routing of only l5Ons per routing step largely eliminates message locality considerations in the concurrent programs for such machines. The design and testing of the TRC as a self-timed chip was no more difficult than it would have been for a synchronous chip

• Creator/s: Defense Technical Information Center
• Date: 1/24/1986
• Year: 1986
• Book Topics/Themes: DTIC Archive, Dally, William J, CALIFORNIA INST OF TECH PASADENA DEPT OF COMPUTER SCIENCE, *CHIPS(ELECTRONICS), SILICON, COMMUNICATIONS NETWORKS, ROUTING

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